1. Field of the Invention:
This invention relates generally to the geometrical layout of capacitors in semiconductor devices. Specifically, the present invention claims a circular layout technique for an individual capacitor in a semiconductor device and a plurality of circular capacitor lattices within semiconductor devices.
2. Description of the Prior Art:
The current state of the art describes the geometrical layout of capacitors in semiconductor devices where the individual capacitors are rectangular in shape and the lattices formed by the individual capacitors are similarly rectangular in shape. Semiconductor manufacturers have preferred rectangular devices because they optimize chip area and for ease of fabrication. However, rectangular capacitors result in poor "matching" of target value capacitance as between capacitors. Matching is defined as the ability to replicate a target value capacitance in farads within a given tolerance for an array of capacitors.
There are four effects detrimental to capacitor matching exhibited by rectangular capacitors. These effects include: (1) corner etching, (2) peripheral capacitance, (3) capacitor to capacitor coupling, and (4) electric field anomalies. These four effects, incidental to rectangular capacitors, are either eliminated or substantially reduced by circular capacitors.
Semiconductor capacitors are comprised of a dielectric material, typically an oxide, which is sandwiched between conductive bottom and top plates. Typically the top plate is smaller in area than the bottom plate to enhance the photolithography alignment process during fabrication. After alignment, the dielectric layer is chemically etched so that the perimeter of the dielectric layer is flush with the perimeter of the top plate.
Corner etching occurs in the manufacturing process when the chemical etching of the dielectric layer, inadvertently and unpredictably etches the corners of the top plate which results in rounded corners. These rounded corners affect the overall capacitance of the device and therefore inhibit accurate matching as between capacitors. Circular capacitors, having an absence of corners by definition, eliminate this detrimental effect.
Peripheral capacitance is defined as an ancillary capacitance that occurs between the top and bottom plates at the periphery of the device as a result of capacitive bridging beyond the dielectric layer. Peripheral capacitance is directly proportional to perimeter and inversely proportional to area. Therefore, peripheral capacitance is minimized when the ratio perimeter to area is minimized. Those skilled in the art will recognized that the circular configuration minimizes this ratio as compared to a rectangular capacitor.
Capacitor to capacitor coupling is the phenomenon of inadvertent capacitance as between individual capacitors. Coupling is a function of the proximity of capacitors and length of adjacent edges between capacitors. For two rectangular capacitors with adjacent edges, there is significant coupling along the entire length of the edge. However, for two adjacent circular capacitors, there is significant coupling capacitance only at the point of nearest proximity. As the plates begin to curve away from each other, coupling capacitance decreases dramatically.
Lastly, anomalous electric fields which are incidental to rectangular devices and the corner etching effect negatively affect capacitor matching. Electric fields radiate outward from the center of the capacitor. For rectangular devices, the electric field is first distorted by the rectangular shape and then further distorted by the cornering etching effect. The circular capacitor provides for a more uniform, concentric electric field. Those skilled in the art of semiconductor design will recognize that maintaining a uniform electric field as between capacitors will enhance capacitor matching.
In summary, the circular capacitor advances the art of semiconductor devices by providing for better matching as between capacitors within an array of capacitors by eliminating or reducing corner etching, peripheral capacitance, capacitor to capacitor coupling and electric field anomalies.